IS61NVP102436A sram equivalent, 36mb state bus sram.
* 100 percent bus utilization
* No wait cycles between Read and Write
* Internal self-timed write cycle
* Individual Byte Write Control
* Single R/W (.
They are organized as 1M words by 36 bits and 2M words by 18 bits,
fabricated with ISSI's advanced CMOS technology.
Inc.
The 36 Meg 'NLP/NVP' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications. They are organized as 1M words by 36 .
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