IS43R16800CC dram equivalent, 128mb ddr synchronous dram.
* Vdd =Vddq = 2.5V+0.2V (-5, -6, -75)
* Double data rate architecture; two data transfers per clock cycle.
* Bidirectional , data strobe (DQS) is transmit.
IS43R16800CC is a 4-bank x 2,097,152-word x 16bit double data rate synchronous DRAM , with SSTL_2 interface. All control and address signals are referenced to the rising edge of CLK. Input data is registered on both edges of data strobe, and output .
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