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IDTVP386 - 8/28-BIT LVDS RECEIVER FOR VIDEO

Description

The VP386 is an ideal LVDS receiver that converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data with bandwidth up to 2.8 Gbps throughput or 350 Mbytes per second.

Features

  • Wide clock frequency range from 20 MHz to 100 MHz.
  • Pin compatible with the National DS90CF386, THine THC63LVDF84, TISN65LVDS94.
  • Converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data.
  • Fully spread spectrum compatible.
  • LVDS voltage swing of 350 mV for low EMI.
  • On-chip PLL requires no external components.
  • Low-power CMOS design.
  • Falling edge clock triggered outputs.
  • Power-down control function.

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Datasheet preview – IDTVP386

Datasheet Details

Part number IDTVP386
Manufacturer Integrated Device Technology
File Size 103.95 KB
Description 8/28-BIT LVDS RECEIVER FOR VIDEO
Datasheet download datasheet IDTVP386 Datasheet
Additional preview pages of the IDTVP386 datasheet.

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Full PDF Text Transcription

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8/28-BIT LVDS RECEIVER FOR VIDEO DATASHEET ADVANCE INFORMATION IDTVP386 General Description The VP386 is an ideal LVDS receiver that converts 4-pair LVDS data streams into parallel 28 bits of CMOS/TTL data with bandwidth up to 2.8 Gbps throughput or 350 Mbytes per second. This chip is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces through very low-swing LVDS signals.
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