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Integrated Device Technology Electronic Components Datasheet

IDT75N43102 Datasheet

NETWORK SEARCH ENGINE 32K x 72 Entries

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NETWORK SEARCH ENGINE
32K x 72 Entries
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Brief
75N43102
To request the full IDT75N43102 datasheet, please contact your local
IDT Sales Representative or call 1-831-754-4555
Device Description
IDT provides proven, industry-leading network search engines
(NSEs) thatenableandacceleratetheintelligentprocessingofnetwork
services in communications equipment. As a part of the complete IDT
classification subsystem that includes content inspection engines, the IDT
family of NSEs delivers high-performance, feature-rich, easy-to-use,
integrated search accelerators.
The IDT 75N43102 is ideally suited for cost-sensitive applications
in the enterprise and access markets. It is a full-ternary 32K x 72 entry
device where each entry location in the NSE has both a Data entry and
an associated Mask entry. The NSE devices integrate content addres-
sable memory (CAM) technology with high-performance logic. The
device can perform Lookup operations plus Read and Write maintenance
operations.
The IDT 75N43102 NSE device has a bi-directional bus that is a
multiplexed address and data bus that can support 62.5 million sustained
searches per second. This device can be configured to enable multiple
width lookups from 72 to 288 bits wide. The IDT 75N43102 requires a
1.5-volt VDD1 supply and a 2.5-volt VDD2 supply.
The IDT 75N43102 NSE utilizes the latest high-performance 1.5V
CMOS processing technology and is packaged in a JEDEC Standard,
256 pin low profile Ball Grid Array.
Block Diagram
CONFIGIN
MATCHIN
CLK2X
PHASEN
÷÷ 2
CCLK
RST
REQSTB
Command Bus
INSTRUCTION
R/W
Request REQDATA
Bus
Address
D
E
C
O
D
E
DATA
Configuration Registers
CONFIGOUT
32K X 72
P
R
SI
IO
ZR
EI
T
LY
O
GE
IN
CC
O
D
E
R
Index
Bus
Global Mask Registers
MATCHOUT
6435 drw 01
System Configurations
The IDT NSEs are designed to fulfill the needs of various types of
networking systems. In solutions requiring data searching such as
routers, a system configuration as shown in Figure 1.0 may be realized.
In this compatible configuration, the NSE interfaces directly to an
ASIC/ FPGA for lookups and routes an Index directly back to the ASIC/
FPGA. Control of the associated handshake signals is provided by the
NSEs for this configuration.
Figure 1.0 ASIC / FPGA Compatible NSE
ASIC
or
FPGA
IDT 75N43102
Network
Search
Engine
5346 drw02
1
© 2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
APRIL 2004
DSC-6435/0B


Integrated Device Technology Electronic Components Datasheet

IDT75N43102 Datasheet

NETWORK SEARCH ENGINE 32K x 72 Entries

No Preview Available !

Network Search Engine 32K x 72 Entries
Datasheet Brief 75N43102
Features
s Full Ternary 32K x 72 bit content addressable memory
s Global Mask Registers
s 72/144/288 multiple width lookups
s 62.5M sustained lookups per second at 72 and 144 width lookups
s Dual bus interface
s Cascadable to 2 devices with no glue logic or latency penalty
s Boundary Scan JTAG Interface (IEEE 1149.1compliant)
s 1.5V match power supply
s 2.5V core and I/O power supply
Bus Interface
www.DataSheet4U.com
The NSE utilizes a dual bus interface consisting of the NSE Request
Bus and the NSE Response Bus.
The NSE Request Bus is comprised of the Command Bus and the
RequestDataBus. TheCommandBushandlestheinstructiontotheNSE
while the Request Data Bus is the main data path to the NSE.
The 72 bit bi-directional Request Data Bus functions as a multiplexed
address and data bus, which performs the writing and reading of NSE
entries, as well as presenting lookup data to the device.
The NSE Response Bus is comprised of an independent unidirec-
tionalIndexBuswhichdrivestheresultofthelookup(orindex) to anASIC.
Functional Highlights
Data and Mask Array
The NSE has Data cell entries and associ-
atedMaskcellentriesasshowninFig.1.1. This
combination of Data and Mask cell entries en-
ables the NSE to store 0, 1 or X, making it a full
ternary Network Search Engine. During a
lookup operation, both arrays are used along
with a Global Mask Register to find a match to a
requested data word.
Figure 1.1
Mask
Data
A 6435 drw 03
Command Bus
TheCommandBusloadsthe specificinstructionsintotheNSE.These
include:
s Read or Write
A Read or Write instruction operates on a specified data entry, mask
entry, or register.
s Lookup
A lookup can be requested in 72-bit, 144-bit or 288-bit widths. A 36-
bit lookup can be accomplished by using two Global Mask Registers.
Registers
There are three basic types of registers supported:
s Configuration Registers are used at initialization to define the
segmentation of the entries.
s Global Mask Registers are provided to support Lookup
instructions by masking individual bits during a search.
s Reply Width Registers are used with Lookup operations.
2


Part Number IDT75N43102
Description NETWORK SEARCH ENGINE 32K x 72 Entries
Maker Integrated Device Technology
Total Page 4 Pages
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