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ICS9LPRS480 - Programmable System Clock

Description

PIN # 1 2 3 4 5 PIN NAME GND48 SMBCLK SMBDAT VDD27 SRC7C_LPRS/27MHz_NS PIN TYPE GND IN I/O PWR OUT DESCRIPTION Ground pin for the 48MHz outputs Clock pin of SMBus circuitry, 5V tolerant.

Data pin for SMBus circuitry, 5V tolerant.

Features

  • Integrated series resistors on all differential outputs.
  • 1 - Greyhound compatible K8 CPU pairs.
  • 5 - low-power differential SRC pairs.
  • 2 - low-power differential chipset SouthBridge SRC pairs.
  • 1 - Selectable low-power differential 100MHz non-spread SATA/ SRC output.
  • 1 - Selectable low-power differential SRC / 27MHz Single Ended outputs.
  • 1 - Selectable HT3 100MHz low-power differential hypertransport clock / HT66MHz Single Ended out.

📥 Download Datasheet

Datasheet Details

Part number ICS9LPRS480
Manufacturer Integrated Device Technology
File Size 278.21 KB
Description Programmable System Clock
Datasheet download datasheet ICS9LPRS480 Datasheet

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS9LPRS480 Programmable System Clock Chip for ATI RS780 - K8TM based Systems Recommended Application: ATI RS780 systems using AMD K8 processors Output Features: • Integrated series resistors on all differential outputs. • 1 - Greyhound compatible K8 CPU pairs • 5 - low-power differential SRC pairs • 2 - low-power differential chipset SouthBridge SRC pairs • 1 - Selectable low-power differential 100MHz non-spread SATA/ SRC output • 1 - Selectable low-power differential SRC / 27MHz Single Ended outputs • 1 - Selectable HT3 100MHz low-power differential hypertransport clock / HT66MHz Single Ended outputs • 1 - 48MHz USB clock • 3 - 14.
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