• Instruction set compatible with IDT79R3000A and IDT79R3001 MIPS RISC CPUs
• High level of integration minimizes system cost, power consumption — IDT79R3000A /IDT79R3001 RISC Integer CPU — R3051 features 4KB of Instruction Cache — R3052 features 8KB of Instruction Cache — All devices feature 2kB o.