ICS83948I-01 Datasheet, Integrated Circuit Systems

* 12 LVCMOS outputs
* Selectable LVCMOS clock or differential CLK, nCLK inputs
* CLK, nCLK pair can accept the following differential input levels: LVDS, LVPE.

demanding well defined performance and repeatability. BLOCK DIAGRAM CLK_EN D Q LVCMOS_CLK CLK nCLK 1 Q0 0 Q1 CLK_SEL Q2.

The ICS83948I-01 is a low skew, 1-to-12 Differential-to-LVCMOS Fanout Buffer and a member HiPerClockS™ of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83948I-01 has two selectable clock inputs. The CLK, nCLK pair can a.

ICS83948I-147

ICS83948I

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ICS83940-01

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