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ICS8344 - 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

General Description

The ICS8344 is a low voltage, low skew fanout buffer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS8344 is designed to translate any differential signal levels to LVCMOS levels.

Key Features

  • 24 LVCMOS outputs, 7Ω typical output impedance.
  • Output frequency up to 167MHz.
  • 275ps output skew, 600ps part to part skew.
  • Translates any differential input signal (PECL, HSTL, LVDS) to LVCMOS without external bias networks.
  • Translates any single-ended input signal to LVCMOS with resistor bias on nCLK input.
  • Translates and inverts any single-ended input signal to LVCMOS with resistor bias on CLK input.
  • Multiple differential clock in.

📥 Download Datasheet

Datasheet Details

Part number ICS8344
Manufacturer Integrated Circuit Systems
File Size 141.77 KB
Description 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
Datasheet download datasheet ICS8344 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY Integrated Circuit Systems, Inc. ICS8344 LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER FEATURES • 24 LVCMOS outputs, 7Ω typical output impedance • Output frequency up to 167MHz • 275ps output skew, 600ps part to part skew • Translates any differential input signal (PECL, HSTL, LVDS) to LVCMOS without external bias networks • Translates any single-ended input signal to LVCMOS with resistor bias on nCLK input • Translates and inverts any single-ended input signal to LVCMOS with resistor bias on CLK input • Multiple differential clock input pairs for redundant clock applications • LVCMOS control inputs • Multiple output enable pins for disabling unused outputs in reduced fanout applications • 3.3V, 2.5V or mixed 3.3V, 2.