ICS83021I Datasheet, Integrated Circuit Systems

* One LVCMOS / LVTTL output
* Differential CLK, nCLK input pair
* CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCS.

with limited board space. IC S www.DataSheet4U.com BLOCK DIAGRAM CLK nCLK Q0 PIN ASSIGNMENT nc CLK nCLK nc 1 2 3 4 8.

T h e I C S 8 3 021I i s a 1 - t o -1 Differential-toLVCMOS/LVTTL Translator and a member of HiPerClockS™ the HiPerClockS™ family of High Performance Clock Solutions from ICS. The differential input is highly flexible and can accept the following inp.

ICS8302

ICS8302-01

ICS83023

ICS83023I

ICS83026I

ICS83026I-01

ICS8302I-01

ICS83032I

ICS8304

ICS8304-01

ICS8304I

ICS8305

ICS83052I