IS61SP12832 Description
The ICSI IS61SP12832 is a high-speed, low-power synchro- nous static RAM designed to provide a burstable, high-performance, secondary cache for the Pentium™, 680X0™, and PowerPC™ microprocessors. It is organized as 131,072 words by 32 bits, fabricated with ICSI's advanced CMOS technology. The device integrates a 2-bit burst counter, highspeed SRAM core, and high-drive capability outputs into a single monolithic...
IS61SP12832 Key Features
- Internal self-timed write cycle
- Individual Byte Write Control and Global Write
- Clock controlled, registered address, data and
- Pentium™ or linear burst sequence control
- Three chip enables for simple depth expansion
- mon data inputs and data outputs
- JEDEC 100-Pin LQFP and
- Single +3.3V, +10%, -5% power supply
- Power-down snooze mode