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HYB 39S64400/800/160BT(L) 64-MBit Synchronous DRAM
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64-MBit Synchronous DRAM
• High Performance: • Multiple Burst Read with Single Write Operation Units MHz ns ns ns ns • Automatic and Controlled Precharge Command • Data Mask for Read/Write Control (x4, x8) • Data Mask for Byte Control (x16) • Auto Refresh (CBR) and Self Refresh • Suspend Mode and Power Down Mode • 4096 Refresh Cycles / 64 ms • Random Column Address every CLK (1-N Rule) • Single 3.3 V ± 0.3 V Power Supply • LVTTL Interface • Plastic Packages: P-TSOPII-54 400mil width (x4, x8, x16) • -7.5 version for PC133 3-3-3 application -8 version for PC100 2-2-2 applications
-7.5
-8 125 8 6 10 6
fCKMAX tCK3 tAC3 tCK2 tAC2
133 7.5 5.
HYB39S64160BT Datasheet
