CY8C4024AZI-S403 Datasheet | Infineon

description PSo C™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU. It bines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSo C™ 4000S product family is a member of the PSo C™ 4 platform architecture. It is a bination of a microcontroller with standard munication and timing peripherals, a capacitive touch-sensing system (CAPSENSE™) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSo C™ 4000S products are upward patible with members of the PSo C™ 4 platform for new applications and design needs. Features - 32-bit MCU subsystem - 48-MHz Arm® Cortex®-M0+ CPU with single-cycle multiply - Up to 32 KB of flash with read accelerator - Up to 4 KB of SRAM - Programmable analog - Single-slope 10-bit ADC function provided by Capacitance sensing block - Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin - Two low-power parators that operate in Deep Sleep low-power mode - Programmable digital - Programmable logic blocks allowing boolean operations to be performed on port inputs and outputs - Low-power 1.71-V to 5.5-V operation - Deep Sleep mode with operational analog and 2.5 µA digital system current - Capacitive sensing - Capacitive sigma-delta provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance - Infineon-supplied software ponent makes capacitive sensing design easy - Automatic hardware tuning (Smart Sense) - LCD drive capability - LCD segment drive capability on GPIOs - Serial munication - Two independent run-time reconfigurable serial munication blocks (SCBs) with re-configurable I2C, SPI, or UART functionality - Timing and pulse-width modulation - Five 16-bit timer/counter/pulse-width modulator (TCPWM) blocks - Center-aligned, edge, and pseudo-random modes - parator-based...