IS62WV25616DBLL Datasheet PDF (ULTRA LOW POWER CMOS STATIC SRAM)

IS62WV25616DBLL - ULTRA LOW POWER CMOS STATIC SRAM

This page provides the datasheet information for the IS62WV25616DBLL, a member of the IS62WV25616DALL ULTRA LOW POWER CMOS STATIC SRAM family.

Description

256K words by 16 bits.

Features

High-speed access time: 35, 45, 55 ns.
CMOS low power operation 30 mW (typical) operating 6 µW (typical) CMOS standby.
TTL compatible interface levels.
Single power supply 1.65V--2.2V Vdd (IS62WV25616DALL) 2.3V--3.6V Vdd (IS62/65WV25616DBLL).
Fully static operation: no clock or refresh required.
Three state outputs.
Data control for upper and lower bytes.
Industrial and Automotive temperature support.
Lead-free a.

Datasheet Details

Part number	IS62WV25616DBLL
Manufacturer	ISSI
File Size	373.71 KB
Description	ULTRA LOW POWER CMOS STATIC SRAM
Datasheet	IS62WV25616DBLL Datasheet
Additional preview pages of the IS62WV25616DBLL datasheet.

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Full PDF Text Transcription

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IS62WV25616DALL/DBLL, IS65WV25616DBLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM MARCH 2015 FEATURES • High-speed access time: 35, 45, 55 ns • CMOS low power operation 30 mW (typical) operating 6 µW (typical) CMOS standby • TTL compatible interface levels • Single power supply 1.65V--2.2V Vdd (IS62WV25616DALL) 2.3V--3.6V Vdd (IS62/65WV25616DBLL) • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial and Automotive temperature support • Lead-free available • 2 CS option available DESCRIPTION The ISSI IS62WV25616DALL and IS62/65WV25616DBLL are high-speed, low power, 4M bit SRAMs organized as 256K words by 16 bits. It is fabricated using ISSI's high- performance CMOS technology.

Published: Jun 9, 2016 |