IS61QDPB42M36 Datasheet, ISSI

* 2M x 36 or 4M x 18.
* On-chip delay-locked loop (DLL) for wide data valid window.
* Separate read and write ports with concurrent read and write operations..

The 72Mb IS61QDPB42M36 and IS61QDPB44M18 are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiates the r.

IS61QDPB42M36A

IS61QDPB42M36A1

IS61QDPB42M36A2

IS61QDPB42M36B

IS61QDPB42M36B1

IS61QDPB42M36B2

IS61QDPB42M36C

IS61QDPB42M36C1

IS61QDPB42M36C2

IS61QDPB42M18A

IS61QDPB42M18A1

IS61QDPB42M18A2

IS61QDPB42M18B