IS61DDPB24M18C sram equivalent, 72mb ddr-iip(burst 2) cio synchronous sram.
* 2Mx36 and 4Mx18 configuration available.
* Common I/O read and write ports.
* Max. 567 MHz clock for high bandwidth
* Synchronous pipeline read with sel.
where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system o.
at page 6 for each ODT option.
DESCRIPTION
The 72Mb IS61DDPB22M36C/C1/C2 and IS61DDPB24M18 C/C1/C2 are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have a common I/O bus. The rising edge of K clock initi.
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