MPC9230 Datasheet | IDT

Features - - - - - - - - - - - - - - - 50 MHz to 800 MHz(1) synthesized clock output signal Differential PECL output LVCMOS patible control inputs On-chip crystal oscillator for reference frequency generation Alternative LVCMOS patible reference clock input 3.3 V power supply Fully integrated PLL Minimal frequency overshoot Serial 3-wire programming interface Parallel programming interface for power-up 32-lead LQFP and 28-lead PLCC packaging 32-lead and 28-lead Pb-free package available Si Ge Technology Ambient temperature range -40°C to +85°C Pin and function patible to the MC12430 800 MHz LOW VOLTAGE CLOCK SYNTHESIZER FN SUFFIX 28-LEAD PLCC PACKAGE CASE 776-02 EI SUFFIX 28-LEAD PLCC PACKAGE Pb-FREE PACKAGE CASE 776-02 FA SUFFIX 32-LEAD LQFP PACKAGE CASE 873A-04 AC SUFFIX 32-LEAD LQFP PACKAGE Pb-FREE PACKAGE CASE 873A-04 Functional Description The internal crystal oscillator uses the external quartz crystal as the basis of its frequency reference. The frequency of the internal crystal oscillator is divided by 16 and then multiplied by the PLL. The VCO within the PLL operates over a range of 800 to 1600 MHz.(1) Its output is scaled by a divider that is configured by either the serial or parallel interfaces. The crystal oscillator frequency f XTAL, the PLL feedback-divider M and the PLL post-divider N determine the output frequency. The feedback path of the PLL is internal. The PLL adjusts the VCO output frequency to be M/4 times the external input reference frequency. Note that for some values of M (either too high or too low) the PLL will not achieve phase lock. The PLL will be stable if the VCO frequency is within the specified VCO frequency range (800 to 1600 MHz(1)). The M-value must be programmed by the serial or parallel interface. The PLL post-divider N is configured through either the serial or the parallel interfaces, and can provide one of four division ratios (1, 2, 4, or 8). This divider extends performance of the part while providing a 50%...