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IDT74LVCH162373A - 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH

General Description

The LVCH162373A 16-bit transparent D-type latch is built using advanced dual metal CMOS technology.

This high-speed, low-power latch is ideal for temporary storage of data.

Key Features

  • Typical tSK(o) (Output Skew) < 250ps.
  • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0).
  • VCC = 3.3V ± 0.3V, Normal Range.
  • VCC = 2.7V to 3.6V, Extended Range.
  • CMOS power levels (0.4μ W typ. static).
  • All inputs, outputs, and I/O are 5V tolerant.
  • Available in TSSOP package DRIVE.

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Datasheet Details

Part number IDT74LVCH162373A
Manufacturer IDT
File Size 212.04 KB
Description 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH
Datasheet download datasheet IDT74LVCH162373A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IDT74LVCH162373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH INDUSTRIALTEMPERATURERANGE 3.3V CMOS 16-BIT IDT74LVCH162373A TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V tolerant • Available in TSSOP package DRIVE FEATURES: • Balanced Output Drivers: ±12mA • Low switching noise APPLICATIONS: • 5V and 3.