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IDT71P72204 Datasheet (idt71p72x04) 18mb Pipelined Qdrii Sram Burst Of 2

Manufacturer: IDT

Overview: www.DataSheet4U.com 18Mb Pipelined QDR™II SRAM Burst of 2.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

Advance Information IDT71P72204 IDT71P72104 IDT71P72804 IDT71P72604 x x x x x x 18Mb Density (2Mx8, 2Mx9, 1Mx18, 512kx36) Separate, Independent Read and Write Data Ports Supports concurrent transactions Dual Echo Clock Output 2-Word Burst on all SRAM accesses DDR (Double Data Rate) Multiplexed Address Bus One Read and One Write request per clock cycle DDR (Double Data Rate) Data Buses Two word burst data per clock on each port Four word transfers per clock cycle (2 word bursts on 2 ports) Depth expansion through Control Logic HSTL (1.5V) inputs that can be scaled to receive signals from 1.4V to 1.9V.

Scalable output drivers Can drive HSTL, 1.8V TTL or any voltage level from 1.4V to 1.9V.

Output Impedance adjustable from 35 ohms to 70 ohms 1.8V Core Voltage (VDD) 165-ball, 1.0mm pitch, 13mm x 15mm fBGA Package JTAG Interface The IDT QDRIITM Burst of two SRAMs are high-speed synchronous memories with independent, double-data-rate (DDR), read and write data ports.

Key Features

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IDT71P72204 Distributor

More Datasheets from IDT

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IDT71P72104 (IDT71P72x04) 18Mb Pipelined QDRII SRAM Burst of 2
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IDT71P72804 (IDT71P72x04) 18Mb Pipelined QDRII SRAM Burst of 2
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IDT71P73204 18Mb Pipelined DDRII SRAM
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