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IDT70P3337 - (IDT70P3307 / IDT70P3337) 1024K/512K x18 SYNCHRONOUS DUAL QDR-II

Download the IDT70P3337 datasheet PDF. This datasheet also covers the IDT70P3307 variant, as both devices belong to the same (idt70p3307 / idt70p3337) 1024k/512k x18 synchronous dual qdr-ii family and are provided as variant models within a single manufacturer datasheet.

Features

  • 18Mb Density (1024K x 18).
  • Also available 9Mb Density (512K x 18).
  • QDR-II x 18 Burst-of-2 Interface.
  • Commercial: 233MHz, 250MHz.
  • Separate, Independent Read and Write Data Ports.
  • Supports concurrent transactions.
  • Dual Echo Clock Output.
  • Two-Word Burst on all DPRAM accesses.
  • DDR (Double Data Rate) Multiplexed Address Bus.
  • One Read and One Write request per clock cycle.
  • DDR (Double Data Rate) Data Buses.
  • Four word burs.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT70P3307_IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT70P3337
Manufacturer IDT
File Size 611.20 KB
Description (IDT70P3307 / IDT70P3337) 1024K/512K x18 SYNCHRONOUS DUAL QDR-II
Datasheet download datasheet IDT70P3337 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
1024K/512K x18 SYNCHRONOUS DUAL QDR-IITM PRELIMINARY DATASHEET IDT70P3307 IDT70P3337 ® Features ◆ 18Mb Density (1024K x 18) – Also available 9Mb Density (512K x 18) ◆ QDR-II x 18 Burst-of-2 Interface – Commercial: 233MHz, 250MHz ◆ Separate, Independent Read and Write Data Ports – Supports concurrent transactions ◆ Dual Echo Clock Output ◆ Two-Word Burst on all DPRAM accesses ◆ DDR (Double Data Rate) Multiplexed Address Bus – One Read and One Write request per clock cycle ◆ DDR (Double Data Rate) Data Buses – Four word burst data (Two Read and Two Write) per clock on each port – Four word transfers per clock cycle per port (four word bursts on 2 ports) ◆ Port Enable pins (E0,E1) for depth expansion ◆ Dual Echo Clock Output with DLL-based phase alignment ◆ High Speed Transceiver Logic in
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