ICS673-01 block equivalent, pll building block.
* Packaged in 16 pin SOIC (Pb-free, ROHS compliant)
* Access to VCO input and feedback paths of PLL
* VCO operating range up to 120 MHz (5V)
* Able to loc.
that require low jitter or jitter attenuation, see the MK2069. For a smaller package, see the ICS663.
Features
* Pa.
The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output .
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