9LPRS501 ics9lprs501 equivalent, ics9lprs501.
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* 2 - CPU differential low power push-pull pairs 10 - SRC differential low power push-pull pairs 1 - CPU/SRC selectable dif.
PIN #
PIN NAME TYPE DESCRIPTION
3.3V PCI clock output or Clock Request control A for either SRC0 or SRC2 pair The power-up default is PCI0 output, but this pin may also be used as a Clock Request control of SRC pair 0 or SRC pair 2 via SMBus. Before .
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