9FGL0651 generator equivalent, 6-output 3.3v pcie clock generator.
▪ Six 100MHz Low-Power HCSL (LP-HCSL) DIF pairs:
* 9FGL0641 default Zo = 100Ω
* 9FGL0651 default Zo = 85Ω
▪ One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) supp.
▪ Servers/High-Performance Computing/Accelerators ▪ Storage ▪ Embedded Systems/Industrial Control
Output Features
▪ Six .
The 9FGL0641 / 9FGL0651 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family. The devices have 6 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL0641 / 9FGL0651 support.
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