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9FGL0251 - 2-Output 3.3V PCIe Clock Generator

Download the 9FGL0251 datasheet PDF. This datasheet also covers the 9FGL0241 variant, as both devices belong to the same 2-output 3.3v pcie clock generator family and are provided as variant models within a single manufacturer datasheet.

General Description

The 9FGL0241 / 9FGL0251 devices are 2-output clock generators in IDT's 3.3V Full-Featured PCIe family.

Each output has a dedicated OE# pin for clock management.

Two different spread spectrum levels in addition to spread off are supported.

4 Common C

Key Features

  • Two 100MHz Low-Power HCSL (LP-HCSL) DIF output pairs:.
  • 9FGL0241 default Zout = 100Ω.
  • 9FGL0251 default Zout = 85Ω.
  • One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support.
  • See AN-891 for easy AC-coupling to other logic families Key Specifications.
  • PCIe Gen1.
  • 4 CC compliant; Gen2.
  • 3 SRIS compliant.
  • DIF cycle-to-c.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9FGL0241-IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 9FGL0251
Manufacturer IDT
File Size 312.39 KB
Description 2-Output 3.3V PCIe Clock Generator
Datasheet download datasheet 9FGL0251 Datasheet

📁 Similar Datasheet

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9FGL0241 3.3V PCIe Gen1-5 Clock Generator Renesas
9FGL0241D 3.3V PCIe Gen1-6 Clock Generator Renesas
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Other Datasheets by IDT

Part Number Description
9FGL02 2-output 3.3V PCIe Clock Generator
9FGL0241 2-Output 3.3V PCIe Clock Generator
9FGL04 4-output 3.3V PCIe Clock Generator
9FGL0441 4-Output 3.3V PCIe Clock Generator
9FGL0451 4-Output 3.3V PCIe Clock Generator

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
2-Output 3.3V PCIe Clock Generator 9FGL0241 / 9FGL0251 Datasheet Description The 9FGL0241 / 9FGL0251 devices are 2-output clock generators in IDT's 3.3V Full-Featured PCIe family. Each output has a dedicated OE# pin for clock management. Two different spread spectrum levels in addition to spread off are supported. The 9FGL0241 / 9FGL0251 supports PCIe Gen1–4 Common Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. Typical Applications ▪ Servers/High-Performance Computing/Accelerators ▪ Storage ▪ Embedded Systems/Industrial Control Output Features ▪ Two 100MHz Low-Power HCSL (LP-HCSL) DIF output pairs: • 9FGL0241 default Zout = 100Ω • 9FGL0251 default Zout = 85Ω ▪ One 3.