Datasheet Details
| Part number | HYMP112P72CP8L-C4 |
|---|---|
| Manufacturer | SK Hynix |
| File Size | 808.80 KB |
| Description | 240pin DDR2 VLP Registerd DIMMs based on 1Gb C version |
| Datasheet |
 HYMP112P72CP8L-C4 Datasheet
|
|
|
General Description
and is subject to change without notice.
Hynix Semiconductor does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Key Features
- JEDEC standard 1.8V +/- 0.1V Power Supply VDDQ : 1.8V +/- 0.1V All inputs and outputs are compatible with SSTL_1.8 interface 4 Bank architecture Posted CAS Programmable CAS Latency 3 , 4 , 5 OCD (Off-Chip Driver Impedance Adjustment) ODT (On-Die Termination) Fully differential clock operations (CK & CK) Programmable Bu.