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HYMD264G726A8-K - Registered DDR SDRAM DIMM

Download the HYMD264G726A8-K datasheet PDF. This datasheet also covers the HYMD264G726A8-H variant, as both devices belong to the same registered ddr sdram dimm family and are provided as variant models within a single manufacturer datasheet.

Description

Hynix HYMD264G726A(L)8-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays.

Features

  • 512MB (64M x 72) Registered DDR DIMM based on 32Mx8 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) Error Check Correction (ECC) Capability Registered inputs with one-clock delay Phase-lock loop (PLL) clock driver to reduce loading 2.5V +/- 0.2V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2 interface.
  • Fully dif.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYMD264G726A8-H_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com 64Mx72 bits Registered DDR SDRAM DIMM HYMD264G726A(L)8-M/K/H/L DESCRIPTION Hynix HYMD264G726A(L)8-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMD264G726A(L)8-M/ K/H/L series consists of eighteen 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD264G726A(L)8-M/K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition. Hynix HYMD264G726A(L)8-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs.
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