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HYMP564S64CLP6-Y5 - 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb

Download the HYMP564S64CLP6-Y5 datasheet PDF. This datasheet also covers the HYMP532S64CP6-E3 variant, as both devices belong to the same 200pin unbuffered ddr2 sdram so-dimms based on 512 mb family and are provided as variant models within a single manufacturer datasheet.

Description

and is subject to change without notice.

Hynix Semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

  • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface Posted CAS Programmable CAS Latency 3, 4, 5, 6 OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination) Fully differential clock operations (CK & CK).
  • Programmable Burst Length 4 / 8 with both sequential and interleave mode Auto refresh and self r.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYMP532S64CP6-E3-Hynix.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HYMP564S64CLP6-Y5
Manufacturer SK Hynix
File Size 295.06 KB
Description 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb
Datasheet download datasheet HYMP564S64CLP6-Y5 Datasheet

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Other Datasheets by SK Hynix

Part Number Description
HYMP564S64CLP6-C4 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb
HYMP564S64CLP6-E3 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb
HYMP564S64CLP6-S5 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb
HYMP564S64CLP6-S6 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb
HYMP564S64CP6-C4 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb C ver. This Hynix unbuffered Small Outline Dual In-Line Memory Module(DIMM) series consists of 512Mb C ver. DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 512Mb C ver. based Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of industry standard. It is suitable for easy interchange and addition. FEATURES • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply All inputs and outputs are compatible with SSTL_1.
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