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HMP31GP7AFR4C-Y5 - 240pin Registered DDR2 SDRAM DIMMs based on 2Gb

Datasheet Summary

Description

and is subject to change without notice.

Hynix Semiconductor does not assume any responsibility for use of circuits described.

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Features

  • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface 8 Bank architecture Posted CAS Programmable CAS Latency 3, 4, 5, 6 OCD (Off-Chip Driver Impedance Adjustment) ODT (On-Die Termination).
  • Fully differential clock operations (CK & CK) Programmable Burst Length 4 / 8 with both sequential and interleave mode.

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Datasheet Details

Part number HMP31GP7AFR4C-Y5
Manufacturer Hynix
File Size 190.03 KB
Description 240pin Registered DDR2 SDRAM DIMMs based on 2Gb
Datasheet download datasheet HMP31GP7AFR4C-Y5 Datasheet
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Full PDF Text Transcription

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240pin Registered DDR2 SDRAM DIMMs based on 2Gb version A This Hynix Registered Dual In-Line Memory Module (DIMM) series consists of 2Gb version A DDR2 SDRAMs in Fine Ball Grid Array (FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 2Gb version A based Registered DDR2 DIMM series provide a high performance 8 byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition. FEATURES • JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/0.1V Power Supply All inputs and outputs are compatible with SSTL_1.
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