HM621400HC Datasheet | Hitachi Semiconductor

HM621400HC Series 4M High Speed SRAM (4-Mword × 1-bit) ADE-203-1199 (Z) Preliminary Rev. 0.0 Nov. 30, 2000 Description The HM621400HC is a 4-Mbit high speed static RAM organized 4-Mword × 1-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed circuit designing technology. It is most appropriate for the application which requires high speed and high density memory, such as cache and buffer memory in system. The HM621400HC is packaged in 400-mil 32-pin SOJ for high density surface mounting. Features - Single 5.0 V supply: 5.0 V ± 10 % - Access time: 10 ns (max) - pletely static memory  No clock or timing strobe required - Equal access and cycle times - Directly TTL patible  All inputs and outputs - Operating current: 140 m A (max) - TTL standby current: 40 m A (max) - CMOS standby current: 5 m A (max) : 1.2 m A (max) (L-version) - Data retension current: 0.8 m A (max) (L-version) - Data retension voltage: 2 V (min) (L-version) - Center VCC and VSS type pinout Preliminary: The specification of this device are subject to change without notice. Please contact your nearest Hitachi’s Sales Dept. regarding specification. HM621400HC Series Ordering Information Type No. HM621400HCJP-10 HM621400HCLJP-10 Access time 10 ns 10 ns Package 400-mil 32-pin plastic SOJ (CP-32DB) HM621400HC Series Pin Arrangement 32-pin SOJ A0 A1 A2 A3 A4 A5 CS VCC VSS Din WE A6 A7 A8 A9 A10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A21 A20 A19 A18 A17 A16 OE VSS VCC Dout A15 A14 A13 A12 A11 NC Pin Description Pin name A0 to A21 Din Dout CS OE WE VCC VSS NC Function Address input Data input Data output Chip select Output enable Write enable Power supply Ground No connection HM621400HC Series Block Diagram (LSB) A15 A14 A13 A6 A7 A8 A12 A11 A3 A1 (MSB) Din Column I/O Column decoder CS Dout Row decoder 1024-row × 256-column × 16-block × 1-bit (4,194,304...