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HM514400BL - 1/048/576-word X 4-bit Dynamic Random Access Memory

Description

Pin name A0 to A9 A0 to A9 I/O1 to I/O4 RAS CAS WE OE VCC VSS Function Address input Refresh address input Data-in/Data-out Row address strobe Column address strobe Read/Write enable Output enable Power (+5 V) Ground 4 Block Diagram RAS Row Driver Row Driver RAS Control Circuit 256 k Memory Ar

Features

  • Single 5 V (±10%).
  • High speed.
  • Access time 60 ns/70 ns/80 ns (max).
  • Low power dissipation.
  • Active mode 605 mW/550 mW/495 mW (max).
  • Standby mode 11 mW (max) 0.55 mW (max) (L-version).
  • Fast page mode capability.
  • 1024 refresh cycles : 16 ms 1024 refresh cycles : 128 ms (L-version).
  • 3 variations of refresh.
  • RAS-only refresh.
  • CAS-before-RAS refresh.
  • Hidden refresh HM514400B/BL, HM514400C/CL S.

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HM514400B 1/048/576-word X 4-bit Dynamic Random Access Memory
HM514400A 1M-Bit x 4-BIT DYNAMIC RAM
HM514400AL 1M-Bit x 4-BIT DYNAMIC RAM
HM514400ASL 1M-Bit x 4-BIT DYNAMIC RAM
HM514400C 1/048/576-word X 4-bit Dynamic Random Access Memory

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ADE-203-269A (Z) 1,048,576-word × 4-bit Dynamic Random Access Memory Rev. 1.0 Nov. 29, 1994 The Hitachi HM514400B/BL, HM514400C/CL are CMOS dynamic RAM organized 1,048,576word × 4-bit. HM514400B/BL, HM514400C/CL have realized higher density, higher performance and various functions by employing 0.8 µm CMOS process technology and some new CMOS circuit design technologies. The HM514400B/BL, HM514400C/CL offer Fast Page Mode as a high speed access mode. Multiplexed address input permits the HM514400B/BL, HM514400C/CL to be packaged in standard 300-mil 26-pin plastic SOJ, standard 400-mil 20-pin plastic ZIP and 26pin plastic TSOP II.
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