| Description | This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flipflop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits entry of new data and resets the first flip-vlop to the low level at the next clock pulse. A high level on the input enables the other input which will then determine the state of the f... |
| Features |
• • • • • High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max Function Table Inputs Clear L H H H H Clock X A X X L X H B X X X L H Outputs QA L QAo L L H QB L QBo QAn ... |
| Datasheet |
 HD74HC164 Datasheet - 51.28KB |
