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HMN4M8DV - Non-Volatile SRAM MODULE 32Mbit

Download the HMN4M8DV datasheet PDF. This datasheet also covers the HMN4M8DN variant, as both devices belong to the same non-volatile sram module 32mbit family and are provided as variant models within a single manufacturer datasheet.

General Description

The HMN4M8DV Nonvolatile SRAM is a 33,554,432-bit static RAM organized as 4,194,304 bytes by 8 bits.

Key Features

  • w Access time : 55, 70ns w High-density design : 32Mbit Design w Battery internally isolated until power is applied w Industry-standard 40-pin 4,096K x 8 pinout w Unlimited write cycles w Data retention in the absence of VCC w 5-years minimum data retention in absence of power w Automatic write-protection during power-up/power-down cycles w Data is automatically protected during power loss PIN.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HMN4M8DN_HanbitElectronics.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HMN4M8DV
Manufacturer Hanbit Electronics
File Size 208.40 KB
Description Non-Volatile SRAM MODULE 32Mbit
Datasheet download datasheet HMN4M8DV Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com HANBit HMN4M8DV(N) Non-Volatile SRAM MODULE 32Mbit (4,096K x 8-Bit), 40Pin-DIP, 3.3V Part No. HMN4M8DV(N) GENERAL DESCRIPTION The HMN4M8DV Nonvolatile SRAM is a 33,554,432-bit static RAM organized as 4,194,304 bytes by 8 bits. The HMN4M8DV has a self-contained lithium energy source provide reliable non -volatility coupled with the unlimited write cycles of standard SRAM and integral control circuitry which constantly monitors the single 3.3V supply for an out-oftolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the memory until after V CC returns valid and write protection is unconditionally enabled to prevent garbled data.