HITANO middle and high voltage series MLCC is designed by a special internal electrode pattern, which can reduce
voltage concentrations by distributing voltage gradients throughout the entire capacitor. This special design also
affords increased capacitance values in a given case size and voltage rating.
HITANO capacitor arrays are developed to offer designers the opportunity to lower placement costs increase
assembly line output through lower component count per board.
» High density mounting due to mounting space saving.
» Mounting cost saving.
» Increased throughput.
» RoHS compliant.& HALOGEM compliant
» For use as a bypass for digital and analog signal line noise
» Computer motherboards and peripherals.
» The other common electronic circuits.
4. HOW TO ORDER
digits followed by
no. of zeros. And
R is in place of
Two significant digits N=Nickel barrier
K=±10% followed by no. of with 100﹪Tin
M=±20% zeros. And R is in
Z=+80-20% place of decimal
5. EXTERNAL DIMENSIONS
W (mm) T (mm)/Symbol S (mm)
2.00±0.15 1.25±0.15 0.85±0.10 H 0.20±0.10 0.25±0.10 0.50±0.10
3.20±0.15 1.65±0.15 0.85±0.10 H 0.30±0.20 0.40±0.15 0.80±0.15
Fig. 1 The outline of Capacitor array
HITANO ENTERPRISE CORP.