HM24C256 Datasheet | H&M Semiconductor

Features -  Low-voltage Operation - 1.7 (VCC = 1.7V to 5.5V) -  Low-Power Devices (ISB = 6 µA @ 5.5V) Available -  Operating Ambient Temperature: -40°C to +85°C -  Internally Organized 16,384 X 8 (128K), 32,768 X 8 (256K),65,536X8(512K bits) -  Two-wire Serial Interface -  Schmitt Trigger, Filtered Inputs for Noise Suppression -  Bidirectional Data Transfer Protocol -  1MHz(5V),400 k Hz (1.7V, 2.7V, 5V) patibility -  Write Protect Pin for Hardware Data Protection -  64-byte Page (128K/256K) Write Modes,128-bye (512k)Write Modes -  Partial Page Writes Allowed -  Self-timed Write Cycle (5 ms max) -  High-reliability - Endurance: 1 Million Write Cycles - Data Retention: 100 Years -  8-lead PDIP, 8-lead SOP and 8-lead TSSOP Packages - General Description The HM24C128/HM24C256/HM24C512 provides 131,072/262,144 /524,288bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as4096 words of 8 bits each The device is optimized for use in many industrial and applications where low-power and low-voltage operation are essential. The HM24C128/HM24C256/HM24C512 is available in space-saving 8-lead PDIP, 8-lead SOP, and TSSOP packages and is accessed via a Two-wire serial interface. In addition, the HM24C128/HM24C256/HM24C512 is available in 1.7V (1.7V to 5.5V) - Pin Configuration Shenzhen H&M Semiconductor Co.Ltd 2 http：//.hmsemi. - Pin Descriptions Pin number Designation 1- 2 A0 - A1 Type I/O & Open-drain I Name and Functions Address Inputs DEVICE/PAGE ADDRESSES (A1, A0): The A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware patibility with other 24Cxx devices. When the pins are hardwired, as many as four 128K/256K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). If the pins are left floating, the A2, A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the...