GS881Z36BT
Features
- User-configurable Pipeline and Flow Through mode
- NBT (No Bus Turn Around) functionality allows zero wait read-write-read bus utilization
- Fully pin-patible with both pipelined and flow through
Nt RAM™, No BL™ and ZBT™ SRAMs
- IEEE 1149.1 JTAG-patible Boundary Scan
- On-chip write parity checking; even or odd selectable
- 2.5 V or 3.3 V +10%/- 10% core power supply
- 2.5 V or 3.3 V I/O supply
- LBO pin for Linear or Interleave Burst mode
- Pin-patible with 2M, 4M, and 18M devices
- Byte write operation (9-bit Bytes)
- 3 chip enable signals for easy depth expansion
- ZZ pin for automatic power-down
- JEDEC-standard packages
- Pb-Free 100-lead TQFP package available
Functional Description
The GS881Z18B(T/D)/GS881Z32B(T/...
