GS880F36AT-7.5 Datasheet, GSI Technology

* Flow Through mode operation; Pin 14 = No Connect
* 2.5 V or 3.3 V +10%/
  –10% core power supply
* 2.5 V or 3.3 V I/O supply
* LBO pin for .

* JEDEC-standard 100-lead TQFP package 512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs www.DataSheet4U.

Applications The GS880F18/32/36AT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performa.