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GS8662D09E - 72Mb SigmaQuad-II Burst of 4 SRAM

Download the GS8662D09E datasheet PDF. This datasheet also covers the GS8662D08E variant, as both devices belong to the same 72mb sigmaquad-ii burst of 4 sram family and are provided as variant models within a single manufacturer datasheet.

Features

  • Simultaneous Read and Write SigmaQuad™ Interface.
  • JEDEC-standard pinout and package.
  • Dual Double Data Rate interface.
  • Byte Write controls sampled at data-in time.
  • Burst of 4 Read and Write.
  • 1.8 V +100/.
  • 100 mV core power supply.
  • 1.5 V or 1.8 V HSTL Interface.
  • Pipelined read operation.
  • Fully coherent read and write pipelines.
  • ZQ pin for programmable output drive strength.
  • IEEE 1149.1 JTAG-co.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS8662D08E-GSITechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS8662D09E
Manufacturer GSI Technology
File Size 1.04 MB
Description 72Mb SigmaQuad-II Burst of 4 SRAM
Datasheet download datasheet GS8662D09E Datasheet

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Other Datasheets by GSI Technology

Part Number Description
GS8662D09BD 72Mb SigmaQuad-II Burst of 4 SRAM
GS8662D07BD 72Mb SigmaQuad-II+ Burst of 4 SRAM
GS8662D07BGD 72Mb SigmaQuad-II+ Burst of 4 SRAM
GS8662D08BD 72Mb SigmaQuad-II Burst of 4 SRAM
GS8662D08E 72Mb SigmaQuad-II Burst of 4 SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Not Recommended for New Design—Discontinued Product 165-Bump BGA Commercial Temp Industrial Temp GS8662D08/09/18/36E-250/200/167 72Mb SigmaQuad-II Burst of 4 SRAM 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad™ Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface • Byte Write controls sampled at data-in time • Burst of 4 Read and Write • 1.8 V +100/–100 mV core power supply • 1.5 V or 1.8 V HSTL Interface • Pipelined read operation • Fully coherent read and write pipelines • ZQ pin for programmable output drive strength • IEEE 1149.
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