Datasheet4U Logo Datasheet4U.com

GS8342T36BD - 36Mb SigmaDDR-II Burst of 2 SRAM

Download the GS8342T36BD datasheet PDF. This datasheet also covers the GS8342T08BD variant, as both devices belong to the same 36mb sigmaddr-ii burst of 2 sram family and are provided as variant models within a single manufacturer datasheet.

Features

  • Simultaneous Read and Write SigmaDDR™ Interface.
  • Common I/O bus.
  • JEDEC-standard pinout and package.
  • Double Data Rate interface.
  • Byte Write (x36, x18 and x9) and Nybble Write (x8) function.
  • Burst of 2 Read and Write.
  • 1.8 V +100/.
  • 100 mV core power supply.
  • 1.5 V or 1.8 V HSTL Interface.
  • Pipelined read operation with self-timed Late Write.
  • Fully coherent read and write pipelines.
  • ZQ pin for pr.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS8342T08BD-GSITechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS8342T36BD
Manufacturer GSI Technology
File Size 268.41 KB
Description 36Mb SigmaDDR-II Burst of 2 SRAM
Datasheet download datasheet GS8342T36BD Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
GS8331 350KHZ Zero-Drift CMOS Rail-to-Rail IO Opamp GAINSIL
GS8332 350KHZ Zero-Drift CMOS Rail-to-Rail IO Opamp GAINSIL
GS8334 350KHZ Zero-Drift CMOS Rail-to-Rail IO Opamp GAINSIL
GS8000 DVI / HDMI Extender Gennum Corporation
GS8041 14.5KHZ CMOS Rail-to-Rail I/O Opamp GAINSIL

Other Datasheets by GSI Technology

Part Number Description
GS8342T36BGD 36Mb SigmaDDR-II Burst of 2 SRAM
GS8342T36E-167 36Mb SigmaCIO DDR-II Burst SRAM
GS8342T36E-167I 36Mb SigmaCIO DDR-II Burst SRAM
GS8342T36E-200 36Mb SigmaCIO DDR-II Burst SRAM
GS8342T36E-200I 36Mb SigmaCIO DDR-II Burst SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
GS8342T08/09/18/36BD-400/350/333/300/250 165-Bump BGA Commercial Temp Industrial Temp 36Mb SigmaDDR-IITM Burst of 2 SRAM 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write (x36, x18 and x9) and Nybble Write (x8) function • Burst of 2 Read and Write • 1.8 V +100/–100 mV core power supply • 1.5 V or 1.8 V HSTL Interface • Pipelined read operation with self-timed Late Write • Fully coherent read and write pipelines • ZQ pin for programmable output drive strength • IEEE 1149.
Published: |