GS8342T08E-250I sram equivalent, 36mb sigmacio ddr-ii burst sram.
* Simultaneous Read and Write SigmaCIO™ Interface
* Common I/O bus
* JEDEC-standard pinout and package
* Double Data Rate interface
* Byte Write (x36 .
Therefore, the SigmaCIO DDR-II SRAM interface and truth table are optimized for burst reads and writes. Common I/O SRAM.
Table Symbol
SA NC R/W BW0
–BW3 NW0
–NW1 LD K K C C TMS TDI TCK TDO VREF ZQ DQ Doff CQ CQ VDD VDDQ VSS Note: NC = Not Connected to die or any other pin
Description
Synchronous Address Inputs No Connect Synchronous Read/.
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