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GS8342D18BD - 36Mb SigmaQuad-II Burst of 4 SRAM

Download the GS8342D18BD datasheet PDF. This datasheet also covers the GS8342D08BD variant, as both devices belong to the same 36mb sigmaquad-ii burst of 4 sram family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Simultaneous Read and Write SigmaQuad™ Interface.
  • JEDEC-standard pinout and package.
  • Dual Double Data Rate interface.
  • Byte Write controls sampled at data-in time.
  • Burst of 4 Read and Write.
  • 1.8 V +100/.
  • 100 mV core power supply.
  • 1.5 V or 1.8 V HSTL Interface.
  • Pipelined read operation.
  • Fully coherent read and write pipelines.
  • ZQ pin for programmable output drive strength.
  • IEEE 1149.1 JTAG-co.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS8342D08BD-GSITechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS8342D18BD
Manufacturer GSI Technology
File Size 364.52 KB
Description 36Mb SigmaQuad-II Burst of 4 SRAM
Datasheet download datasheet GS8342D18BD Datasheet

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Other Datasheets by GSI Technology

Part Number Description
GS8342D18AE 36Mb SigmaQuad-II Burst of 4 SRAM
GS8342D18E-167 36Mb SigmaQuad-II Burst
GS8342D18E-200 36Mb SigmaQuad-II Burst
GS8342D18E-250 36Mb SigmaQuad-II Burst
GS8342D18E-300 36Mb SigmaQuad-II Burst

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
GS8342D08/09/18/36BD-400/350/333/300/250 165-Bump BGA Commercial Temp Industrial Temp 36Mb SigmaQuad-IITM Burst of 4 SRAM 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad™ Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface • Byte Write controls sampled at data-in time • Burst of 4 Read and Write • 1.8 V +100/–100 mV core power supply • 1.5 V or 1.8 V HSTL Interface • Pipelined read operation • Fully coherent read and write pipelines • ZQ pin for programmable output drive strength • IEEE 1149.