GS8321V18E srams equivalent, 36mb sync burst srams.
* IEEE 1149.1 JTAG-compatible Boundary Scan
* 1.8 V +10%/
–10% core power supply
* 1.8 V I/O supply
* LBO pin for Linear or Interleaved Bur.
* JEDEC-standard 165-bump FP-BGA package
* Pb-Free 165-bump BGA package available
Functional Description
Applica.
Applications The GS8321V18/32/36E is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds .
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