GS8321E36GE-V datasheet, srams equivalent, GSI Technology

Features and benefits

* FT pin for user-configurable flow through or pipeline operation
* Dual Cycle Deselect (DCD) operation
* IEEE 1149.1 JTAG-compatible Boundary Scan
* 1.8 .

Application

* JEDEC-standard 165-bump FP-BGA package
* RoHS-compliant 165-bump BGA package available Functional Description .

Description

Applications The GS8321E18/32/36E-xxxV is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Leve.

Image gallery