* FT pin for user-configurable flow through or pipeline operation
* Single/Dual Cycle Deselect selectable
* IEEE 1149.1 JTAG-compatible Boundary Scan
* ZQ.

* JEDEC-standard 119- and 165-bump BGA packages
* RoHS-compliant packages available Functional Description Appli.

Applications The GS816218/36D-xxxV is an 18,874,368-bit high performance synchronous SRAM with a 2-bit burst add.

GS816218DB-150

GS816218DB-200

GS816218DB-250

GS816218DB-333

GS816218DB-375

GS816218DB-400

GS816218DD-150

GS816218DD-200

GS816218DD-250

GS816218DD-333

GS816218DD-375

GS816218DD-400

GS816218DD-xxxV

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