* FT pin for user-configurable flow through or pipeline operation
* Dual Cycle Deselect (DCD) operation
* 2.5 V or 3.3 V +10%/
  –10% core power .

* RoHS-compliant 100-lead TQFP package available Functional Description Applications The GS8160E18/32/36DGT is an 18.

Applications The GS8160E18/32/36DGT is an 18,874,368-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs,.

GS8160E36DGT

GS8160E18DGT

GS816018BT-150

GS816018BT-200

GS816018BT-250

GS816018T-133

GS816018T-150

GS816018T-166

GS816018T-200

GS816018T-225

GS816018T-250

GS816032BT-150

GS816032BT-200

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