* FT pin for user-configurable flow through or pipeline operation
* Single Cycle Deselect (SCD) operation
* 2.5 V or 3.3 V +10%/
  –10% core powe.

* JEDEC-standard 100-lead TQFP package
* RoHS-compliant 100-lead TQFP package available Functional Description A.

Applications The GS816018/32/36BT is an 18,874,368-bit (16,777,216-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter. Although of a type origin.

GS816018BT-200

GS816018BT-250

GS816018T-133

GS816018T-150

GS816018T-166

GS816018T-200

GS816018T-225

GS816018T-250

GS816032BT-150

GS816032BT-200

GS816032BT-250

GS816032T-133

GS816032T-150

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