CDP1835C Datasheet Preview

CDP1835C Datasheet

CMOS 2048-Word x 8-Bit Static Read-Only Memory

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Read-Only Memories (ROMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __

CDP1835C

MA7

MA6

MAS

MA4

MA3

MA2

MAl

MAO

BUSO

BUSI

BUS2

VSS

I 24 Voo

2 23 TPA

3 22 cn

4 21 CSI

5 20 CS2

6 19 MRli

7 18 CEO

8 17 BUS7

• 9 16 BUS6

10 IS BUSS

II 14 BUS4

12 13 BUS3

TOP VIEW

92CS-33188

TERMINAL ASSIGNMENT

CMOS 2048-Word X 8-Bit Static

Read-Only Memory

Features:

• Interfaces with CDP1800-series microprocessors

(fCIOCk::; 5 MHz) without additional components

• On-chip address latch

• On-chip address decoder pro~ides programmable location within 64K

memory space

• Three-state outputs

The RCA-COP1835C is a 16384-bit mask-programmable

CMOS read-only memory, organized as 2048 words x 8 bits

and is completely static: no clocks required. It will directly

interface with COP1800-series microprocessors that have

clock frequencies up to 5 MHz without additional

components.

The COP1835C responds to a 16-bit address multiplexed on

8 address lines. Address latches are provided on-chip to

store the 8 most significant bits of the 16-bit address. By

mask option, this ROM can be programmed to operate in

any 2048-word block of 64K memory space. The polarity of

the high address strobe (TPA), MAD, CEI, CS1, and CS2 are

user mask-programmable.

The Chip-Enable output signal (CEO) is "high" when the

device is selected. Terminals CEO and CEI can be connected

in a daisy chain to control selection of RAM memory in a

microprocessor system without additional components.

The COP1835C has a recommended operating voltage

range of 4 to 6.5 volts.

The COP1835C is supplied in 24-lead heremetic dual-in-

line side-brazed ceramic packages (0 suffix) and 24-lead

dual-in-line plastic packages (E suffix).

RAM

CPU

CDPIBOO

SERIES

I/O

Fig. 1 - Typical CDP1800 Series microprocessor system.

92CM-33192RI

File Number 1267

742 ________________________________________________________________

CDP1835C Datasheet Preview

CDP1835C Datasheet

CMOS 2048-Word x 8-Bit Static Read-Only Memory

No Preview Available !

Read-Only Memories (ROMs)

CDP1835C

MAXIMUM RATING, Absolute-Maximum Values:

DC SUPPLY-VOLTAGE RANGE, (Voo)

(All voltages referenced to Vss terminal) ............ .

. .............................. , ..................... , .. -0.5 to +7 V

INPUT VOLTAGE RANGE, ALL INPUTS ........... ..

. ........... -0 5 to Voo +0 5 V

DC INPUT CURRENT, ANY ONE INPUT ............ .

. .......................................................... ~O~

POWER DISSIPATION PER PACKAGE (Po)

For TA = -40 to +60'C (PACKAGE TYPE E) ..........

.. ........................................................ 500 mW

For TA = +60 to +85'C (PACKAGE TYPE E) ................................................. Derate linearly at 12 mW/'C to 200 mW

For TA = -55 to +100'C (PACKAGE TYPE D)...............

. ........................................................ 500 mW

For TA = +100 to +125'C (PACKAGE TYPE D) ...........

. ..... Derate Linearly at 12 mW/'C to 200 mW

DEVICE DISSIPATION PER OUTPUT TRANSISTOR

For TA = FULL PACKAGE-TEMPERATURE RANGE ....................................................................... 100 mW

OPERATING-TEMPERATURE RANGE (TA)

PACKAGE TYPE 0 ......

.. .......................................................................... -55 to +125'C

PACKAGE TYPE E ................................................................................ , ................-40 to +85'C

STORAGE TEMPERATURE RANGE (T"g) ........................................................................... -65 to +150'C

LEAD TEMPERATURE (DURING SOLDERING)

At distance 1/16 ± 1/32 In (159 ± 0 79 mm) from case for 10 s max ....................................................... +265'C

OPERATING CONDITIONS at TA = FULL PACKAGE-TEMPERATURE RANGE

For maximum reliability, nominal operating conditions should be selected so that operation is always within the

following ranges'

CHARACTERISTIC

DC Operating Voltage Range

Input Voltage Range

LIMITS

CDP1835C

Min.

Max.

4 65

Vss Voo

UNITS

MA7

MA.

MAO

MA.

MA3

MA2

MA'

MAO

, ADDRESS

LATCH,

CONTROL

CIRCUIT

3 AND

• DECODER

SELECT

'2:048 II 8

MEMORY

ARRAY

I.17

OUTPUT

BUFFERS

BUS 7

BUS 6

BUS 5

BUS 4

aus 3

BUS 2

BUS I

BUS 0

TPA

MRO

Q---l.!- V DO

o--!-!-- Vss

OUTPUT

CONTROL

CS'

CS2

92CM-31227

Fig. 2 - Functional block diagram.

_______________________________________________________________ 743

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CDP1835C Datasheet

CMOS 2048-Word x 8-Bit Static Read-Only Memory

CDP1835C Datasheet

CMOS 2048-Word x 8-Bit Static Read-Only Memory

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