MB90F443G
Overview
- Clock Internal PLL clock multiplication circuit Base oscillation divided into two or multiplied by one to four Minimum execution time : 62.5 ns (4 MHz oscillation, PLL clock multiplication multiplier = 4, VCC = 5.0 V) 32 kHz subsystem clock
- Instruction set optimized for controller applications Supported data types : bit, byte, word, and long-word types Standard addressing modes : 23 types Singed multiplication/division and extended RET1 instructions 32-bit accumulator enh
