MB90341
Key Features
- Built-in PLL clock frequency multiplication circuit
- Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed. (devices without Ssuffix only)
- Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multiplied PLL clock)
- Built-in Clock Modulation circuit
- 16 Mbyte CPU memory space
- 24-bit internal addressing
- Instruction system best suited to controller
- Wide choice of data types (bit, byte, word, and long word)
- Wide choice of addressing modes(23 types)
- Enhanced multiply-divide instructions and RETI instructions
