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MBL8041N - NMOS Universal Peripheral Interface 8-Bit Microcomputer

Download the MBL8041N datasheet PDF. This datasheet also covers the MBL8041A variant, as both devices belong to the same nmos universal peripheral interface 8-bit microcomputer family and are provided as variant models within a single manufacturer datasheet.

Description

The MBL8041A Universal Peripheral Interface is a single-chip 8bit microcomputer based on a 8-bit parallel microprocessor chip.

The MBL8041A is fa~l{!cated with an N-channel silicongate MOS process.

Features

  • Processor: 8-bit parallel processing.
  • Register: One 8-bit Status Register (for Interface with master process.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MBL8041A-Fujitsu.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MBL8041A NMOS Universal Peripheral Interface 8-Bit Microcomputer
MBL8041E NMOS Universal Peripheral Interface 8-Bit Microcomputer
MBL8041H NMOS Universal Peripheral Interface 8-Bit Microcomputer
MBL8042H NMOS Universal Peripheral Interface 8-Bit Microcomputer
MBL8042N NMOS Universal Peripheral Interface 8-Bit Microcomputer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Advanced Products • MBL8041A/H/E/N NMOS Universal Peripheral Interface 8-Bit Microcomputer FUJITSU October 1986 Edition 2.0 Description The MBL8041A Universal Peripheral Interface is a single-chip 8bit microcomputer based on a 8-bit parallel microprocessor chip. The MBL8041A is fa~l{!cated with an N-channel silicongate MOS process. The MBL8041A has a lKx8 bit ROM for program memory, a 64x8 bit RAM for data memory, 18 I/O ports, an 8-bit timer/counter and clock generator on the chip, and is powered by single +5V supply. The MBL8041A is designed to operate as a slave Processor, which receives commands and data from the master processor. controls peripheral devices and transfers input data from peripheral devices to the master processor.
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