MB87L2250
Key Features
- General Features 2.1. ARC 32-Bit RISC CPU
- Mapping MPEG registers and MPEG memory into auxiliary address space
- Mapping ARC registers into auxiliary address space
- mercial development tools
- MetaWare High CTM ‘C’ piler, assembler, linker
- MetaWare SeeCodeTM graphical debugger operates in 2 modes
- interfaces to hardware evaluation board, or: simulates software using a ‘C’ model of the ARC 2.2. Host Interface (optional)
- 1 PID for video / 1 PID for audio / 1 PID for Teletext (EBU Teletext SPB-492)
- 29 PID’s for section data (PAT, PMT, PSI and private SI as Electron
