MB86943B Overview
The MB86943B is a bus bridge that allows high-speed [data] transfers between the host processor (SPARClite Family) and the PCI-bus. This bridge chip enables SPARClite (host CPU) access in program mode (direct master operation) to devices on a PCI bus. Also, the SPARClite host can invoke the built-in DMA function on the bridge chip to allow access to devices on the PCI bus.
MB86943B Key Features
- Functions for SL-bus to PCI slave (possible to work in program mode)
- Functions for PCI-bus to SL-bus slave (possible to work in program mode)
- Two-channel DMA functions (between the SL-bus and the PCI-bus)
- Functions to access the SL-bus’s external areas (ECS0 through ECS2)
- Interrupt munication functions between the SL-bus and the PCI-bus by use of Door Bell and Mail Box
- Direct Master Operation Allows the SL-bus processor to directly access the PCI space. Allows high-speed burst transfer v
- Direct Slave Operation Allows the PCI-bus master to directly access the SL-bus space. Allows high-speed burst transfer v
- Carries out 32/64-bit transfer
- Possible to work DMA control from the SL-bus side
- Bidirectional DMA functions by use of the bidirectional data buffer having a capacity of 128 bytes